Chiplets Reduce Development Time and Cost

Chiplet Summit announces its second annual event on February 6-8 at the Santa Clara Convention Center. This year’s conference focuses on techniques that extend Moore’s Law to ever-smaller dimensions. Chiplets reduce costs, increase modularity and scalability, and avoid wastage. They lead to more powerful chips and faster time-to-market. This year’s emphasis will be on co-design methods in which all stages of design proceed simultaneously. It will also focus on the fast-emerging area of generative AI with its huge demands.

The Summit will feature major vendor keynotes, expert tables, and technology and market updates. It will also offer sessions on architectures, development methods, and applications, as well as panels on architectures and platforms, optimization, viable markets, and industry trends. Designers will learn to develop high-performance chips at low cost. An exhibit area will showcase the latest products.

“Chiplets help designers control costs and schedules at the latest process nodes. They also allow capture of off-the-shelf designs,” said Chuck Sobey, Chiplet Summit General Chair. He noted that “The event will bring specialists in all aspects of chip development together to ensure successful projects.”

To discuss exhibiting, contact:

Elizabeth Leventhal, Exhibit Sales Director

Elizabeth@ChipletSummit.com

+1.760.809.5755

To ask about the program, contact:

Lance Leventhal, Program Chairperson

Lance@ChipletSummit.com

+1.858.756.3327

About Chiplet Summit

Chiplet Summit showcases the emerging chiplet market. It features the people who are using chiplets in designs for processors, communications chips, and AI devices. The Summit is a product of Semper Technologies.

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